A quick look at the high input power specifications and linearity specifications that are usually used in RF Power amplifier specifications. These quantities generally are: 1 dB compression, PSAT, IIP3 and OIP3. These are defined and described below.
1.0 1 dB compression: In the linear region of a RFPA operation, as the input power is increased, the output power also increases linearly. However, if the input power is continuously increased a point is reached where the increase in output power does not occur linearly. The output power starts compressing. This means that even though the input power is increased the output power does not respond to that increase. When the output power falls 1 dB below what was expected of a linear amplifier, that point is the 1 dB compression point of the amplifier. In many cases the 1 dB compression point is assumed to be the end of linear operation for the amplifier although in reality the amplifier starts compressing much before this point.
2.0 PSAT: PSAT stands for saturated output power of the amplifier. This means that as the power input to the amplifier is increased even beyond the 1 dB compression point a point will be reached where the gain of the amplifier will become 0 dB i.e. the amplifier is saturated at that point. Sometimes a 3 dB saturation point is also defined as a saturation point of the amplifier for more definition for the user.
3.0 IIP3: As the RFPA starts coming closer to compressing and gain starts changing from linear to compressed ( and in some cases even earlier, second and third order distortion products of the input signal start appearing in its output. A way to quantify this type of linearity distortion is to use quantities such as IIP3. As stated above as the input signal is continuously increased the output power also increases. If the third order distortion product is monitored, it will be found to increase at three times the rate of the fundamental component. If the third order product power is extrapolated it will intersect with the fundamental output power characteristic at a point where the input power is IIP3. It is a limiting power point that is used to understand the linearity of an amplifier as well as the limits of operation of the amplifier.
4.0 OIP3: OIP3 is simply the power being delivered by the RFPA when the input power is IIP3. Different users and manufacturers use IIP3 and OIP3 or both when specifying their amplifiers.
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FPGA Design and development service
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A wideand RF detector ( 40 Mhz to 3 Ghz) -75 dBm to 5 dBm input
Linear detector performance
A wideband linear RF detector
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Wideband RF detector perforamce , more details
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2 stage 35 dB gain RF amplifier. Front of the module
Full range frequency response
2 stage amplifier deta
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miniature LNA module
Mni LNA performance
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A high frequency divider from 500 Mhz to % Ghz+
The input interface.
The frequency divider has a differential analog interface. The following parameters apply:
The minimum frequency that can be input is 500 Mhz and the maximum frequency is 6.0 Ghz.
The RF input level is 5 dBm to – 5 dBm. For lower frequencies make sure that the slew rate is
greater than 560 V/us. The input is biased by two 500 Ohm resistors connected to a 1.6V DC bias.
Therefore AC coupling is used at the input. These are two 100pF capacitors.
The output interface.
The output is single ended. The output driver is capable of sourcing and sinking 24 mA. The
equivalent output impedance is 50 Ohm. To avoid reflections it is recommended that the divider
work into a 50 Ohm load.
The inputs are applied to the input SMA I/O. The product will work with both a differential input as
well as a single ended input. However, a differential input works best. The division ratio is applied
to the N1 and N2 control inputs as follows:
N2 N1 Division ratio
0 0 8
0 1 16
1 0 32
1 1 64
The logic levels are:
Logic level Voltage
1 1.4V minimum
0 0.6V maximum
The supply voltage interface.
The operating supply voltage is 3.3V typical. The quiescent (DC) operating supply current is 2 mA.
A high frequency divider 500 Mhz to 5 Ghz+
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SPDT DC to 3 Ghz RF switch
DC to 3 Ghz RF SPDT switch
RF Switch typical features
Supply voltage = Vcc = 0/+5 Vdc
Operatng temperature = TA = -50° C to 125 Deg C
Operating impedance = 50 Ohm
Input power for 1 dB
compression ( 5.0V system) = 37 dBm ( f = 0.5 to 3 Ghz)
Input third order Intercept = 64 dBm ( 0 to 5.0V system, f = 0.5 to 3 Ghz)
Operating frequency range = DC to 3 Ghz.
Insertion loss DC to 3 Ghz = 0.8 dB
Isolation DC to 3 Ghz = 14 dB minimum
Return loss DC to 3 Ghz = 20 dB
50% contl to 10/90 %
( ON/OFF) = 120 ns
A single stage RF amplifier as a gain block
A single stage RF amplifier summary specifications
Gain, Operating: 19.5 dB
Operating frequency range: 1.0 – 2700 Mhz
OIP3: (Pout = 19.0 dBm), -8.5 dBm
P1dB: 4.6 dBm
N.F: 4.2 dB
Supply voltage Operating: 3.3 – 5.5 Volts
Price: single unit $7.50, 100 units : $5:50.
Free delivery, shipping lead time 2 days.
30 day return policy, buyer ships.
Supply current Supply = 5.0V, 23.0 mA
Embedded design and development
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