A PLL is a very popular and useful component with many applications and forms. Its design is usually not easy to simulate on a device level and can also be very time consuming. In order to speed up the design work, the PLL can be simulated using an analog behavioral model ( ABM). ABM resources are usually available in most circuit simulators and other CAD tools. A recent paper from Signal Processing Group Inc., presents the results of an ABM simulation for a PLL. Interested readers can access the paper from the SPG website under the Complementary link.
PLL linear model: Simulation results using PSPICE ABM