Analog and mixed signal design: The level of simulation required for a first pass success.

What does the level of simulation have to be to predict the level of success of an IC? What does “level” imply? In the context of simulation of an IC, level implies how much of the IC was included in, perhaps a circuit simulation in a “SPICE-like” simulator. The reason this is so important is that in many cases it is not possible to simulate a full chip, specially if the chip contains mixed signal elements or large and small time constants, etc. Therefore the level of simulation for first pass success should be 100%. i.e the full chip was simulated under operating conditions that are a 100% identical to actual. It is of course not really possible to do this. It usually takes a combination of CAD tools to do this starting from MATLAB-SIMULINK, through circuit simulation and perhaps IBIS type modeling and simulation. In a few cases even more extensive simulation may be performed using Thermal Simulators. So the question remains:what is the level of simulation required for a high degree of confidence in the success of the chip? The answer must surely be that when all the CAD~tools have been used to their ultimate capacity, add a large measure of engineering judgment. This is the only way currently known! Please visit Signal Processing Group Inc.’s website at for more technical papers and information.

ASICs versus analog and RF/wireless ASIC

The term ASIC may be a misnomer for an analog or RF/wireless/MMIC device. When we think ASIC we seem to equate the term to a large digital chip done in very fine line technology costing many millions of dollars, taking a long time, fraught with risk and fear. That is an apt description of the large digital ASIC in our view. However, an analog or mixed signal or RF/Wireless/MMIC custom chip does not play in the same ball park or even in the same neighborhood. For starters these types of devices tend to be smaller and in terms of number of active devices less complex. Sometimes an analog or mixed signal or RF/wireless/MMIC device may only be a couple of devices! Perhaps its time to come up with a new buzzword for these types of devices. Please check out Signal Processing Group Inc website at for more information on these helpful devices. If you register you can get a userid and a password for protected areas of the site that contain much valuable information.

Manchester decoder and encoder

A final design of the manchester decoder and encoder was completed in record time. The encoder is of course, the simpler part ( or so they say). However, it turned out that when loopback was applied to the encoder decoder combination the source of malfunction in the initial iteration was traced to the so called easy part, the encoder. So designer beware, the decoder only seems more difficult. It is the encoder that will get the designer in trouble.There are few “nitty-gritties” that have to be addressed. For more on the subject contact Signal Processing Group Inc., at

Analog IC design: The case for ASICs

Recently we had a conversation with a design engineer involved in the implementation of a wireless communication system. His input was interesting . He indicated that even though he got a majority of his devices right off the shelf, it turns out that he still had glaring gaps in his implementation . The reason for this, was that his application required some customization which could only be done using ASICs, both digital and analog. His initial solution to the digital problem was the use of programmable logic devices ( PLD). However the cost of the PLD in volume was prohibitive. So ultimately an ASIC was the only solution. Certain analog functions were also put into an ASIC for the same reasons. So the lesson is that although the design engineer can buy off the shelf devices for a majority of his design implementaion he cannot entirely fill his BOM with standard devcies and for the optimum solution may require one or two ASICs. Costs for ASICs can be made quite low. Please visit for more information about ASIC implementations.

4 Bit synchronous counter design revisited

Synchronous logic is usually preferred because everything gets synchronized to a clock and race conditions are generally avoided in design. A look at a 4 bit synchronous counter showcases the method quite clearly and may be of use to practitioners of the art as a refresher and to designers new to the field. A brief paper on the design of a 4 bit synchronous counter has been released by Signal Processing Group Inc., and may be found in the “Engineer’s corner” at for interested users.

Manchester decoder

Manchester codes are a way to combine clock and data into a single stream and send it serially over a communications link, wireline or wireless. Manchester encoding is relatively simple and is basically a modulo-2 operation with the variables being the clock and data. The clock is actually twice the frequency of the original data clock. Care must be taken to make sure that there are no glitches or spikes in the resulting waveform. Manchester decoding on the other hand is much more involved and is not a trivial operation. There are a number of techniques to do this. Some are software based, some are hardware based. Some are based on time delays while others are based on PLL type circuits. The techteam at Signal Processing Group Inc., has analyzed a number of these techniques and come up some circuits that do Manchester decoding. Interested users may contact SPG at for details. A NDA may be required.

EEPROM substitute for non volatile ID storage

After having struggled for a fairly significant amount of time to design a circuit to read EEPROMs for storage of IDs for a radio communication system, it suddenly hit us that we did not need to do this. Designing either a hardware circuit to use I2C based EEPROMs or a software equivalent is an experience that we think we would not like to have again if we can avoid it. From datasheets that the designers never have their own people use to involved and intricate operation ( WRITE, READ etc); its a nightmare. On the other hand we came up with a simple way to store IDs with almost trivial ease. Its as they say ” a no brainer”. For design engineers who are fed up with the EEPROM method, we say try this other technique and you will see how easy it is and how CHEAP it is! Contact us from the Signal Processing Group Inc.’s website at for a discussion. You may have to sign a NDA but if you are really serious then this should not be a show stopper.

I2C interface and Manchester encoder chip

A fairly common operation in communications is the sending of an ID over a radio channel to establish a secure link. One method to do this could be to use a serial EEPROM ( 128 bits typically) with an I2C interface and a Manchester encoder. The receiver has a decoder which recovers the signal, clock and data. A chip that can do these types of functions would be a really useful device. Except that a search on the web failed to yield a product like this. One or two semiconductor companies have Manchester encode/decode devices but they are prohibitively expensive in addition to not having the needed I2C interface, serial shift register etc. etc.. A PLD could be used to do these functions except that in volume the PLDs may not be competitive. Signal Processing Group Inc., has developed an encoder and decoder for manchester code based communications. Please contact Signal Processing Group Inc., at for details.