4 Bit synchronous counter design revisited

Synchronous logic is usually preferred because everything gets synchronized to a clock and race conditions are generally avoided in design. A look at a 4 bit synchronous counter showcases the method quite clearly and may be of use to practitioners of the art as a refresher and to designers new to the field. A brief paper on the design of a 4 bit synchronous counter has been released by Signal Processing Group Inc., and may be found in the “Engineer’s corner” at http://www.signalpro.biz for interested users.

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