Recently we received the first silicon of an IF chip designed in 0.6um BiCMOS process. Among other functional blocks is a RSSI circuit. It is composed of three logamps that provide the gain for the IF signal and three RSSI blocks that provide the RSSI signal current output. This current is subsequently converted to voltage through the addition of a resistive/capacitive load ( external) and an optional buffer. The frequency of operation that has been used in tests is 70 Mhz and 280 Mhz. The supply voltage for the chip varies from 3.3V to 6.0V. The IP can be used in other applications if desired. It is also available for purchase and porting as needed. Interested parties can contact Signal Processing Group Inc, through the website or directly at email@example.com.