The clock distribution within a customer’s digital chip relies strongly on de – skewing the regional clock signals typically using an all digital PLL. We propose an approach for this ADPLL with respect to a CMOS 0.18um process. A compromise is required so that size, power and jitter may be minimized.
Specifications: From an analysis of the clock distribution network we have formulated the specifications for the ADPLL frequency synthesizer.
A current source digital to analog converter is inherently fast. It can be implemented in most semiconductor technologies. This post and its accompanying article/ white paper describes one such DAC that uses a 0.18um CMOS technology ( decidedly legacy in semiconductor terms) but its assessments are equally applicable to latest CMOS technology. The various analysis for circuit, performance, power etc. etc can be used as a template with appropriate modifications for any CMOS process. Please visit the Signal Processing Group Inc., website to access the full white paper that can be found under the “complementary” menu.
3D design and modeling has come a long way in the last few years. At Signal Processing Group Inc. we are using it to our advantage (and our customer’s advantage) to design, model and print enclosures and more. ( An example of a simple enclosure is shown below). A number of CAD tools ( Solidworks, Shaper3D, etc) have come up that allow this 3d design to be done. Young designers graduating from design schools like The Art Center in Pasadena, California are making inroads into the design world and are available to work for businesses/individuals to produce beautiful designs for spacecraft to pencils and everything in between. A particularly interesting application is in medicine and biomedicine. Robotics is benefiting greatly from this art/technology too. I believe this is going to be a technology that will serve us well in the coming years and its advance can be fairly well predicted. Please contact Signal Processing Group Inc. if you would like to get going in 3D technology and printing.
A charge pump PLL is a popular way to design a PLL. It is a good idea to analyze its requirements and relate the design to those parameters even before the functional blocks are designed. This provides the design engineer a pathway to complete the design from behavioral modeling to a final semiconductor layout to be fabricated. The higher level analysis can be done very quickly and lays bare the techniques, risks, timelines etc. for the design. A recent whitepaper by Signal Processing Group Inc. presents these assessments. The article can be found under the complementary menu in the SPG website. Please visit the SPG website for this and other articles of interest.
A touchstone file is a composite file composed of s parameters of a device in a particular format. It allows certain CAD tools ( or the engineer) a way to analyze the device using s parameters for various operating modes and extract valuable information about the performance of the device. Please visit the Signal Processing Group Inc. website and access more details about the touchstone file under the complementary menu.
S – parameters are the most popular parameters used in the design, development, test, measurement and related tasks for RF, microwave and mmWave . This post deals with the very basics of s parameters. It can be used by newcomers to the field or seasoned engineers who may just want to refresh themselves about these parameters. Please visit the Signal Processing Group Inc. website and the complementary page to access the details.
In many calculators dBs and Nepers are used as (for example) units of attenuation. Here is the conversion between the two of them. 1 Neper= 8.6860000037 db and, 1 dB = 0.1151277918 Np. Please visit the Signal Processing Group Inc. website for more interesting information and services delivered.
I find it interesting that as I progress through RF/Microwave design how sizes of the circuits shrink continuously with operating frequency ( medium power). The attached image ( blurred a trifle for proprietary reasons) shows a completed board for a 26.5 Ghz, 2 watt power amplifier. The active device design is done in GAN technology and the board substrate is a RO4350 with gold plating and impedance control ( read $$$ cost). Be that as it may, notice the comparative size in the image. Everything about this board is minute. The SMA connectors are minute, the thickness of the substrate is minute, etc. The design was done using Keysight ADS and (interestingly), QUCS and Octave ( as the math engine). The input and output impedances are 50 Ohm. Anyone interested in more details may contact me on email@example.com. One interesting facet of the module design was the time spent in identifying the SMA connectors for 26.5 Ghz. I find it interesting that most suppliers seem to stop at 18 Ghz for component frequency performance. So 26.5 Ghz is a novelty now I suppose. It may not be for long though. Please visit the Signal Processing Group Inc. website for more interesting technical and business information.
Recently we had to find a method to measure the loss of microstrip line connected to a socket pin. We could not access the load end of the line so with some help from a friendly supplier we found a way to measure the loss using the input of the line, a directional coupler and assorted test equipment. The brief paper describing this technique may be found on the Signal Processing Group Inc. website along with other interesting articles under the complementary menu.
Its interesting how difficult it turned out to be when we were looking for sma connectors for 25 Ghz – 26.5 Ghz. It turns out that sma connectors in this range of frequency are not very common. We finally ended up finding a connector sourced by Amphenol which fits the bill. Please visit our website at www.signalpro.biz for details on how to connect to us for any questions or comments or to check out some free items ( “complementary “) or other technical or service information.